How a CPU works: Bare metal C on my RISC-V toy CPU(florian.noeding.com)
florian.noeding.com
How a CPU works: Bare metal C on my RISC-V toy CPU
https://florian.noeding.com/posts/risc-v-toy-cpu/cpu-from-scratch/
38 comments
This gets brought up every time the topic shows up but https://www.nand2tetris.org is a course that abstracts how a computer works, and is worth checking out
Is there a version of something like this that’s purely software?
Like, emulate gates and keep building bigger pieces until you have a function that’s a CPU. Etc.
I guess I’m thinking a bit more lower level than an emulator where you implement an opcode using normal capabilities of your language of choice.
I guess TFA is pretty close to this in ways, too.
Like, emulate gates and keep building bigger pieces until you have a function that’s a CPU. Etc.
I guess I’m thinking a bit more lower level than an emulator where you implement an opcode using normal capabilities of your language of choice.
I guess TFA is pretty close to this in ways, too.
I have been building a CPU using: https://github.com/hneemann/Digital
Much faster than Logisim, UI a little clunky, but my CPU runs around 0.5Mhz and it has very nice peripherals like Telnet, graphics ram, VGA etc
Terrible name that is hard to google, but great tool.
Much faster than Logisim, UI a little clunky, but my CPU runs around 0.5Mhz and it has very nice peripherals like Telnet, graphics ram, VGA etc
Terrible name that is hard to google, but great tool.
Yeah. There this book which uses Haskell based Clash to build up simple CPUs, a VGA controller and other peripherals.
hardcover:
https://www.lulu.com/shop/gerg%C5%91-%C3%A9rdi/retrocomputin...
or digital:
https://leanpub.com/retroclash/
hardcover:
https://www.lulu.com/shop/gerg%C5%91-%C3%A9rdi/retrocomputin...
or digital:
https://leanpub.com/retroclash/
Oh that’s exactly what I was hoping for! Thank you!
The great Niklaus Wirth wrote a book which you might want to check out: Digital Circuit Design for Computer Science Students: An Introductory Textbook.
In college, we wrote a CPU simulation in C, for a simple architecture called "little computer". You could call it an emulator, but the whole idea was to faithfully implement all the pipelining and register renaming and stuff. A main loop iteration was equivalent to a clock cycle.
Worth a mention: https://turingcomplete.game
I've played for a few hours, it's well made!
Mvp, thanks for sharing
I always wanted to understand how a CPU works, how it transitions from one instruction to the next and makes a computer work. So I thought: let's implement one and run a C program on it.
The textbooks by Hennessy and Patterson are the definitive ones. I think every programmer would be very well served reading them. There's older editions available online for free that are perfectly adequate for understanding the big picture.
Check out some videos by Ben Eater on Youtube
Unless your name is Ben, in which case I'd advise caution.
Ben Eater routinely makes me feel ashamed of how awful my breadboard wiring looks. Fantastic videos.
To be fair, all the wires he uses are pre-cut / pre-shaped for the video. The videos are meticulously planned and marvelously executed. Normally hobby projects do not have nearly as much thought put into them.
I've been taking the time to perfectly measure out all the wires on my 8-bit because I don't mind the monotony, its kind of peaceful. But holy hell it takes a long time.
Its like 95% measuring and cutting, 5% thinking, testing and debugging.
Its a bit of a welcome relief from software, which is 95% thinking and 5% typing. A bit of monotony might be good for the brain.
Its like 95% measuring and cutting, 5% thinking, testing and debugging.
Its a bit of a welcome relief from software, which is 95% thinking and 5% typing. A bit of monotony might be good for the brain.
+1 to Ben Eater! His videos helped me so much during university, it was like finding real gold between fool's gold.
yes, these are great!
This is written for young people, but still accurate: Code: The Hidden Language of Computer Hardware and Software by Charles Petzold
Link: https://www.amazon.com/Code-Language-Computer-Hardware-Softw...
It's got a very slow, methodical onramp with a lot of diagrams and a light, breezy style. You end up building a (very simple) computer in the end, including instruction processing.
Link: https://www.amazon.com/Code-Language-Computer-Hardware-Softw...
It's got a very slow, methodical onramp with a lot of diagrams and a light, breezy style. You end up building a (very simple) computer in the end, including instruction processing.
The textbooks by Hennessy and Patterson are the definitive ones.
Nice that you support multi-cycle memory instead of essentially using a big register file like https://nandgame.com/ uses.
I recently came across https://makerchip.com/, and the TL-Verilog language it supports looks useful for when you want to make a pipelined design later.
I recently came across https://makerchip.com/, and the TL-Verilog language it supports looks useful for when you want to make a pipelined design later.
The idea with multi-cycle memory was to create a special challenge for myself. Also I thought about using the same technique would be useful if I later on wanted to have mul / div in hardware, which would take a couple of cycles too.
I'm watching this video about TL-Verilog, and the part starting here shows how powerful it is for that kind of thing: https://youtu.be/hQ6HhOBHKy0?t=2048
In short, you can define generic reusable flow constructs like stall and backpressure pipelines. You can then instantiate them and slot in your logic, and signals will be automatically pulled through the different stages and pipelines as needed. The example at this part of the video shows then how adding something can be a two line change when it would be hundreds of lines if you were working at the RTL level: https://youtu.be/hQ6HhOBHKy0?t=2581
In short, you can define generic reusable flow constructs like stall and backpressure pipelines. You can then instantiate them and slot in your logic, and signals will be automatically pulled through the different stages and pipelines as needed. The example at this part of the video shows then how adding something can be a two line change when it would be hundreds of lines if you were working at the RTL level: https://youtu.be/hQ6HhOBHKy0?t=2581
You might find the QtRVSim simulator interesting:
- WASM version: https://comparch.edu.cvut.cz/qtrvsim/app/
- source & native releases: https://github.com/cvut/qtrvsim
It visualizes the inner workings of a basic RISC-V CPU, you can choose a basic single-cycle CPU, or a full 5-stage pipelined CPU with a hazard unit.
I also recently wrote a 5-stage RISC-V CPU in SystemVerilog, the implementation should be reasonably well-commented:
https://github.com/MatejKafka/risc-v_pipelined_cpu
- WASM version: https://comparch.edu.cvut.cz/qtrvsim/app/
- source & native releases: https://github.com/cvut/qtrvsim
It visualizes the inner workings of a basic RISC-V CPU, you can choose a basic single-cycle CPU, or a full 5-stage pipelined CPU with a hazard unit.
I also recently wrote a 5-stage RISC-V CPU in SystemVerilog, the implementation should be reasonably well-commented:
https://github.com/MatejKafka/risc-v_pipelined_cpu
The article looks really interesting, can't wait to dig in!
Side note: the articles on compilation also seem to be good and simple to understand, especially the one about code generation (which is a topic that other articles somehow always skip)
Side note: the articles on compilation also seem to be good and simple to understand, especially the one about code generation (which is a topic that other articles somehow always skip)
Nice article!
[I think there's a minor typo in the Combinational Logic section - should it read "(sometimes also called combinatorial logic)"?]
[I think there's a minor typo in the Combinational Logic section - should it read "(sometimes also called combinatorial logic)"?]
thank you, fixed.
This is a really fantastic read! I wonder if the author might consider including links to the git source for the entire project?
Thank you!
I'll think about sharing the code. Large code parts - while working - did not pass my quality bar, since I did not have enough time to clean and refactor while learning. But maybe that's fine. Hmm.
I'll think about sharing the code. Large code parts - while working - did not pass my quality bar, since I did not have enough time to clean and refactor while learning. But maybe that's fine. Hmm.
>"But maybe that's fine."
Oh I think it's more than fine :)
Your goal wasn't to write a C++ or Python app it's was to create almost everything from first principles. I also don't think anyone would doubt your abilities after reading this post. You could link to the article in the repo. I think it's speaks for itself. My first thought when I read the article was "Wow, this is great." I've read it twice now. Thank you for sharing.
Oh I think it's more than fine :)
Your goal wasn't to write a C++ or Python app it's was to create almost everything from first principles. I also don't think anyone would doubt your abilities after reading this post. You could link to the article in the repo. I think it's speaks for itself. My first thought when I read the article was "Wow, this is great." I've read it twice now. Thank you for sharing.
You are right :)
Here's the repo: https://github.com/fnoeding/fpga-experiments
I'll update the post with it too.
Here's the repo: https://github.com/fnoeding/fpga-experiments
I'll update the post with it too.
This is great. Cheers!
Lovely write-up, thank you for sharing your process!
I love computers
Wait we get 64bits risc-v on par with x86_64 on the desktop and arm64 on the mobile...
Oh, and what was done, it would be illegal with x86_64 and arm64 as you would have to pay a license in some countries... once you want to make money out of it.
Oh, and what was done, it would be illegal with x86_64 and arm64 as you would have to pay a license in some countries... once you want to make money out of it.
x86_64 and arm64 are not subject to license fees anymore, for instance in the USA?