I looked at the Mega65 with its three (not quite) 6502 CPU variants and I just found it so weird. Basically no 16 bit operations, instead a couple of 32 bit operations. Z register is no longer 0 and you have to set it non-zero to change bank configuration. Five instructions (nine bytes) to change bank and I do not understand how you can save the previous bank setting in case you want to restore it.
If you move the stack or zero page, the well known trick of using absolute plus index register no longer works the same as on the 6502 (breaking existing code). Sure, you could hardcode a different page, but the point of moving the stack is (probably) so you could do multi-tasking. But if processes are given different stack pages, they can no longer share code (if using such well known tricks in the code).
Moving zero page is in 256 steps, so you cannot use it as a movable stack frame (the 65816 can set it to any location in the first 64K).
I know there is a lot of interest in the Mega65, but I found it had so many poorly made design decisions that made me want to stay far away.
So far I find the 65816 to a well designed 16 bits ISA (I am also familiar with PDP-11, MSP430, MELPS7700 and Motorola 6812) that gives a lot of 6502 vibes, but is just a lot better. There are a couple of odd corners, probably due to the opcode space as you mention, but I would not call it a bunch of compromises.
You can work with 24 bit pseudo registers in the direct page using the [dd],y addressing mode, basically scaling up the very useful (dd),y on the 6502 to be 24+16 bits instead of 16+8.
I am currently working on a compiler for the 65816 and has taken the approach of avoiding mode shifts as much as possible. I also lock the direct page and bank register to a fixed place while running normally. This simplifies it a lot.
Segmenting your functions/code block on 64K is not a huge limitation. How big functions do you write? LOL
The 65816 does require more discipline when programming than the 6502.
Yes, they all went 68000 which is no wonder as it was a step up further. The 16 revolution never really happened, we went from 8 to 32 bits computers.
Commodore did go back to modify the 6502 later, that was the Commodore 65. That the C65 project went as far as it did is beyond me. I would have stopped it immediately if I was shown it at the time, both from marketing and technical aspects. Today, I suppose it makes some minor sense to revive it as a curiosity, just for the sake of it.
I wonder how you can find the 65816 odd, when the Mega 65 comes with three altered variants of the 6502. Also considering that some well known 6502 programming idioms no longer works as before, as soon as you move the zero page or the stack. Having studied them all, I find the 65816 puts those 6502 variants to shame.
If you move the stack or zero page, the well known trick of using absolute plus index register no longer works the same as on the 6502 (breaking existing code). Sure, you could hardcode a different page, but the point of moving the stack is (probably) so you could do multi-tasking. But if processes are given different stack pages, they can no longer share code (if using such well known tricks in the code). Moving zero page is in 256 steps, so you cannot use it as a movable stack frame (the 65816 can set it to any location in the first 64K).
I know there is a lot of interest in the Mega65, but I found it had so many poorly made design decisions that made me want to stay far away.
So far I find the 65816 to a well designed 16 bits ISA (I am also familiar with PDP-11, MSP430, MELPS7700 and Motorola 6812) that gives a lot of 6502 vibes, but is just a lot better. There are a couple of odd corners, probably due to the opcode space as you mention, but I would not call it a bunch of compromises.