Thank you for your reply! I did a bit of research and, since I do want to use quite some peripherals, I have gone for the ULX3S. A big factor here was documentation and availability; If I would have been able to find a MiSTer Pi I might have gone for that instead.
I now bought a ULX3S on a whim, and will at least evaluate how usable it is for my purposes. It will take quite some time to familiarize myself with a new toolchain, which kinda sucks. One advantage of these big proprietary IDEs is that they integrate a lot of functionality into one "unit" (as far as the user/programmer is concerned), instead of having to install a lot of separate tools.
For the course, I am now considering to "support" an AMD board, an Intel one, and a Lattice one.
This sucks. I was working on a video course on building CPUs on an FPGA that uses Vivado (because I am somewhat familiar with the ecosystem and have dev boards with Artix FPGAs).
I am still contemplating my options. I can still use Vivado 2025, I guess, but I am not sure that is the right direction.
What are realistic alternatives for Vivado? (Taking into account the availability of supported affordable entry-level dev boards?)
> Fun fact #1: you rent your cap and gown in the US. You have to return them. And they’re expensive, too! I paid $94 just for the privilege of renting mine, which is insane because they probably cost way less than that to manufacture.
Ah, yes, of course this is how it works in the US.
I don't have a lot to show for it yet, but I'm working on an online video course for software engineers aspiring to build their own CPU on an FPGA dev board.
- I didn't like the "truth tables" one, I got many duplicate questions and for some reason I got only one second for the first question. The rest of the questions I managed to answer correctly but I still got only one start out of three?
- I got very confused by the capacitor. Capacitors do not have an "enable" gate! In fact, in 2.7 (1T1C) you are supposed to build the enable gate -- with a transistor. So currently, you can just simply not build the enable gate and use the one already in the primitive, meaning you don't need the NMOS gate at all.
Was this made using LLM-assistence? (Not judging, I'm just interested!) I'd love to hear more about your workflow and how you managed to produce a good UI as it's something I couldn't do if my life depended on it, and it's a skill I'd like to learn.
I have noticed a trend recently that some practices (writing a decent README or architecture, being precise and unambiguous with language, providing context, literate programming) that were meant to help humans were not broadly adopted with the argument that it's too much effort. But when done to help an LLM instead of a human a lot of people suddenly seem to be a lot more motivated to put in the effort.
Surprisingly often people refuse to document their architecture or workflow for new hires. However, when it's for an LLM some of these same people are suddenly willing to spend a lot of time and effort detailing architecture, process, workflows.
I've seen projects with an empty README and a very extensive CLAUDE.md (or equivalent).
> There are very credible arguments that the-set-of-IETF-standards-that-describe-OAuth are less a standard than a framework. I'm not sure that's a bad thing, though.
I tried using this a while back and found it was not widely available. You need coreutils version 9.1 or later for this, many distros do not ship this.
Some people are obviously very intelligent and for people with enough technical abilities this can be spotted (e.g. because they churn out a large volume of high-quality code with almost zero defects). I have definitely seen this.
But I have also seen a colleague getting promoted that took thrice the scheduled time to deliver on a low-impact project, planning 2-3 long meetings a week, with about 8 people, discussing details for hours and hours (of course without writing anything down). When he went on leave for a few weeks, leaving a significant backlog of work and noting to our manager that "it's trivial to release", I actually managed to release it. At the end-of-year review he was praised for "deliviring such a complicated project", while the higher impact project I worked on and delivered in 1/3rd of the scheduled time was seen as a "simple project" because it got delivered without any hiccups.
Often it's also just a matter of "this guy states facts with confidence so it seems he knows what he's talking about" (even when he gets the facts wrong). At some point I just stopped correcting him because if we disagreed people would just assume I was wrong. In other words, being good at talking helps your career a lot.
Yeah I've gone through Linux from Scratch twice, but at some point I found myself just copy-pasting and to be honest I've never really understood how one would go from here to a modern distro (besides compiling a helluva lot more software).
Ouch, this hurts to read. It's not novel and lacks a very basic understanding of math.
The graph of y/(x^2+y^2)=(x+1)/(x^2+y^2) by definition contains the points that satisfy this equation. This is exactly the set of points for which y = x + 1.
The "fuzzy" graph is just coloring the difference between the left hand side and right hand side. This is very basic, not new, and it's definitely not "the graph of y/(x^2+y^2)=(x+1)/(x^2+y^2)".