Phrasing seems a bit orchestrated, and seems like it's meant to get you to give up because it's happening no matter what. That video with "and this is dangerous to our democracy" comes to mind.
>If it does not work in software, it's not going to work in hardware.
Aren't there limits to what can be simulated in software? Analog systems dealing with infinite precision, and having large numbers of connections between neurons is bound to hit the von Neumann bottleneck for classical computers where memory and compute are separate?
No AM5 chipset can do 5.0 speeds, they are all linked via x4 PCIe 4.0 lanes. What you're thinking about is PCIe 5.0 speeds from CPU to SSDs/GPU. There's no chipset that does PCIe 5.0 speeds, they are all on 4.0.
>Right, only the B650E chipset has official PCIe 5.0 support.
There is no AM5 chipset with PCIe 5.0 support. They are all on PCIe 4.0. The lanes come from CPU, they go to SSDs/GPU/chipset. All AM5 chipsets are linked to CPU via PCIe 4.0 lanes, none support PCIe 5.0 speeds.
edit: Not sure why the downvote, this is common information and it should be easy to link an AM5 motherboard that has x4 PCIe 5.0 downlink lanes to chipset. But they do not exist.
>But it's not the hardware that's the difficult problem
I think the problem is that we're still making the distinction between hardware and software. There isn't any. Or if we insist on it we have to deal with the von Neumann bottleneck.
Hardware-software hasn't been cracked yet. I believe this is a good primer on the issue: https://youtu.be/0UVa7cQo20U
From what I can understand, current hardware and software paradigm is the limiting factor.