Strange. A good engineering manager would see that "way too big" PoE daughter board design as exactly what one would want in a reference design that will be used to test and integrate your preferred PoE solution. Power product life cycles are so short and availability problems so frequent that a good engineering manager knows that their engineers will be reworking power solutions with some regularity.
A good engineering manager would also know that UI development for commercial products is not optional. The engineering manager will expect that marketing will want branding at the very least, that differentiating features will need to be surfaced, etc., and that all of this will need to be integrated into build, test and the package system, and QA'd on real hardware. Basic stuff for an engineering manager.
This is wrong. OpenWRT is fostering several manufacturers that are using OpenWRT as the factory platform for their products. This is a reference design (one of several, this particular one from 2024 is now dated and newer designs are available,) provided by OpenWRT, and they've thoughtfully made it available to anyone that might want one: you can just go buy some with no NDA bullshit and get your developers moving in your lab or doing UI development or whatever. The not-cost-optimized PCB is what you want for this, in addition to the ample RAM+Flash. The "useless" POE is another aspect of this: access points use POE ubiquitously, which is a key OpenWRT use case.
"Process node," in the sense of logic, RAM or Flash density, isn't relevant here. These are power devices. Silicon Carbide FETS and whatnot; bulk current switching and related devices. Not frontier process node logic devices.
That reality is carefully left unclear in all this "silicon sovereignty" narrative. It's a nice plant with new tooling cranking out 300mm wafers, but it's not the same game as a TSMC or Intel fab making cutting edge, high margin silicon, and there are a number of competitors making similar power devices around the world. And yes, the "AI" fluff is pure marketing nonsense; everyone needs lots of power devices for everything. Yes, they'll obviously seek lucrative contracts to supply exotic power devices for AI applications, but that stuff gets commoditized quickly.
It just a time limit of the life of a single MicroVM.
Using this for a long lived "developer environment" would be extraordinarily expensive anyhow. Scaling the vCPU + RAM cost of these to the same shape compute optimized Graviton On-Demand EC2 instance (16 vCPU x 32 GB RAM) shows about 4x the cost.
It's a lab. It's where ASML brings up the prototype machine and gets it working, with IBM talent working out the problems and getting it ready for commercial operation. They won't make chips at scale there: the facility isn't designed for that part. The thing to understand here is that isn't a simple, clean, comprehensible business arrangement. The Albany facility is highly subsidized by the state. IBM has their hooks deep in the operation and occupation of the site. Such facilities are extraordinary with capabilities that talent that are unique and fabulously expensive. That's why ASML is there, and not just doing it in some village in the Netherlands. It's why when Obama, Biden, Trump or whomever tells ASML to whom they will and won't be selling hardware, ASML listens.
Broadly speaking yes, this is the business model. IBM has been at this for many years with technology transfers, licensing agreements, support and other arrangements. Rapidus, Samsung, GlobalFoundries, ST, SMIC, AMD, etc. have all used IBM R&D work at various times for various nodes and products.
The cutting edge of semiconductors is a writhing mass of copulating tapeworms, and IBM lives deep inside that ball. For IBM, what this means is that when you buy one of the ASML machines to make products with this process, you'll pay IBM for the knowledge and support to actually get it working, or give them a cut, or something else, TBD, as circumstances warrant.
That only applies for network sockets, and requires taking responsibility for the entire network protocol stack. Not something that should be done without a very compelling reason, and not applicable at all in this case, where storage devices are involved.
Know that the increase in CPU utilization may mean you've improved the performance of your "database server," because now your CPU cores are waiting less on IO. It also may not mean this, but just looking at htop won't tell you either way.
It is tragic. Another repetition of Hoare's Billion Dollar Mistake, exactly where it should not have been made, long after the consequences were well understood, and also previously repeated at the time Go was conceived.
There really isn't an excuse, and it isn't possible to hate null/nil/undefined/etc. enough.
Is this some xBSD or UniFi OS (debian) with ZFSoL? Can't tell from what they've written. 8C+64GB: enough for essential block+file service, but not for dedup and other demanding ZFS features. Also, doesn't appear the controller is redundant; just the power supplies. iSCSI is headlined; nice they didn't limit this to file. No mention of object store, or NVMe-oF.
Seems like a nice, basic, affordable platform for workgroup/SME stuff. Not NetApp/Pure Storage "enterprise" grade though.
> Any shared sense of rigour is just completely torpedoed by the LLM world
Consider that this shared sense of rigour you have in mind is illusory, and LLMs and their context struggles are simply revealing this. I see precious little rigour in any of the 'tech' world I've lived in for decades. The tools proliferate, paradigms emerge and die and reemerge, and whatever stick you consider using to measure any of it has competitors with different units. Past the physics of power and signaling, and the prevailing cost of a silicon wafer, we are almost all, relative to a small number of much older disciplines, muddlers of various degrees of skill.
I've found dealing with context limits relatively easy: specify and confine. LLMs need clear specifications and strong guidance to produce good work.
But that's just my current muddling take on the practice. Perhaps, 90 days from now, even this burden will be gone, and a simple prompt will generate world class operating systems, programming languages and a formal basis in mathematics for both.
Partly. Another factor in the equation is load.