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dhruvdh

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Accelerating LLM Inference with Parallel Draft Models (PARD)

amd.com
1 points·by dhruvdh·anno scorso·0 comments

Open-sourcing Three EXAONE 3.5 Models: 2.4B, 7.8B, 32B

lgresearch.ai
13 points·by dhruvdh·2 anni fa·4 comments

comments

dhruvdh
·6 mesi fa·discuss
Try `uvx pocket-tts serve`
dhruvdh
·anno scorso·discuss
El Capitan can also do FP8. HPC requires double precision generally but people are trying to make low precision work.
dhruvdh
·anno scorso·discuss
To be fair, you can buy ~3 of these for the price Nvidia charges for 24GB/32GB models.
dhruvdh
·anno scorso·discuss
To add, AMD only makes _parts_ of an MI300X server.

It's like asking a tire manufacturer to give you a car for free.
dhruvdh
·2 anni fa·discuss
I wish more people would just try to do things just like this and blog about their failures.

> The published version of a proof is always condensed. And even if you take all the math that has been published in the history of mankind, it’s still small compared to what these models are trained on.

> And people only publish the success stories. The data that are really precious are from when someone tries something, and it doesn’t quite work, but they know how to fix it. But they only publish the successful thing, not the process.

- Terence Tao (https://www.scientificamerican.com/article/ai-will-become-ma...)

Personally, I think failures on their own are valuable. Others can come in and branch off from a decision you made that instead leads to success. Maybe the idea can be applied to a different domain. Maybe your failure clarified something for someone.
dhruvdh
·2 anni fa·discuss
Disappointed that there wasn’t anything on inference performance in the article at all. That’s what the major customers have announced they use it for.
dhruvdh
·2 anni fa·discuss
Which algorithm you pick for what shape of matrices is different and not straightforward to figure out. AMD currently wants you to “tune” ops and likely search for the right algorithm for your shapes while Nvidia has accurate heuristics for picking the right algorithm.
dhruvdh
·2 anni fa·discuss
> despite them being fabless

That's not how it works. You need to pump money into fabs to get them working, and Intel doesn't have money. If AMD had fabs to light up their money, they would also have a much lower valuation.

The market is completely irrational on AMD. Their 52-week high is ~225$ and 52-week low is ~90$. 225$ was hit when AMD was guiding ~3.5B in datacenter GPU revenue. Now, they're guiding to end the year at 5B+ datacenter GPU revenue, but the stock is ~140$?

I think it's because of how early Nvidia announced Blackwell (it isn't any meaningful volume yet), and the market thinks AMD needs to compete with GB200 while they're actually competing with H200 this quarter. And for whatever reason the market thinks that AMD will get zero AI growth next year? I don't know how to explain the stock price.

Anyway, they hit record quarterly revenue this Q3 and are guiding to beat this record by ~1B next quarter. Price might move a lot based on how AMD guides for Q1 2025.
dhruvdh
·2 anni fa·discuss
> Performance per watt was better for Intel

No, not its not even close. AMD is miles ahead.

This is a Phoronix review for Turin (current generation): https://www.phoronix.com/review/amd-epyc-9965-9755-benchmark...

You can similarly search for phoronix reviews for the Genoa, Bergamo, and Milan generations (the last two generations).
dhruvdh
·2 anni fa·discuss
Is AMD behind hyperscaler in-house efforts? Outside of Google I don't think so.
dhruvdh
·2 anni fa·discuss
Oh, maybe also change the title? I flagged it because of the title/url not matching.
dhruvdh
·2 anni fa·discuss
I don't think having a common ancestry for the ISA means much, or even having the same ISA.

Anyway, I don't understand what you want from me or are arguing about. They were trying to win the datacenter CPU market and not the GPU market. They did well at that. They've recently started trying to win the GPU market as well, cause now they can afford to. They seem to be doing well now.
dhruvdh
·2 anni fa·discuss
Those are Vega, not CDNA. It wouldn't surprise me if those are rebranded consumer chips, though I haven't checked.
dhruvdh
·2 anni fa·discuss
And yet Meta is using MI300X exclusively for all live inference on Llama 405B.

Clearly there are workloads AMD wins at, and just going Nvidia by default for everything without considering AMD is suboptimal.
dhruvdh
·2 anni fa·discuss
You know AMD primarily sells CPUs right?

For datacenter GPUs, they're going from ~500M-750M in 2023 full year (can't find proper numbers), to 4.5B+ full year 2024. In GPUs, it's almost like they're entering a new market.

The current Instinct line of products is relatively new too, I found this article [1] on the MI100 launch on Nov, 2020. That's basically start of 2021.

To go from MI100 in 2021, to 4.5B+ of MI300X + MI250X in 2024 is great. They are doing just fine.

On MI355X, I can't find endnotes for the slides they show, but it is not clear if the 9.2PF of FP6 and FP4 is sparse or not (all the other numbers on that slide were non-sparse). If it isn't they're exceeding GB200's sparse FP6/4 numbers with non-sparse flops (!). They both have the same memory bandwidth though. AMD is doing just fine.

[1] https://www.servethehome.com/amd-radeon-instinct-mi100-32gb-...
dhruvdh
·2 anni fa·discuss
Batching is how you get ~350 tokens/sec on Qwen 14b on vLLM (7900XTX). By running 15 requests at once.

Also, there is a Dockerfile.rocm at the root of vLLM's repo. How is it a pain?
dhruvdh
·2 anni fa·discuss
Why would you use this over vLLM?
dhruvdh
·2 anni fa·discuss
What's the point of the 8000 LOC limit? Has anyone worked in a project with a LOC limit? Why was the limit in place?
dhruvdh
·2 anni fa·discuss
The MacBook NPU is 3x slower than the 45 TOPS threshold required for Copilot+ PC branding.
dhruvdh
·2 anni fa·discuss
Yeah, and any updates to the model that make Recall attractive, cannot go back in time and reanalyze the past to be more useful.

At least they will learn a lot from this, in 6-12 months and perhaps a new generation of NPUs we might have something attractive.