We've been thinking on this. It is definitely a though issue but it is not different from the opportunity of decapping a commercial chip and try to get IP from there. There a three options we have been thinking: 1. Obfuscated register mapping with a synced TRNG, 2. A light cipher. 3. Physical and structural logic obfuscation. The area overhead is an issue and we are trying to gather some results from an internal research going on to see feasibility.
Guessing following cases: 1) Education 2) Synthesized analog functions: PLL, ADC, DAC, Filters, etc. 3) Do your own standard cells using a new kind of logic 4) Proof-of-concept for analog circuitry
Good point. We are trying to cover some mid-end apps too. Basically the reason is we are planning to implement some functionality on-the-chip, such as a USB 3.1 PHY which requires a decent tech.
The current measured chip v.1 of the Open-V has not USB PHY. We are using a USB-to-SPI cable to program the micro. However, we are developing a low-speed USV PHY: PCS and PMA; and also a high speed PHY USB3.1 https://twitter.com/onchipUIS/status/787124721955508224. We are hoping to tapeout soon the USB PHYs to see feasibility inclusion for Open-V v.2.
C is supported. We are using the riscv.org toolchain considering that the micro has a RV32IM set. An arduino bootloader will make the micro Arduino-compatible .
Programming examples, registers documentation and Schematics will be provided. Remember the old National Semiconductor Databooks? We would release the complete design data, so users will be able to propose different ideas with the integrated HW.
