Been using Devin for a few months now, for Typescript and Python.
I've never seen it check-in uncompilable code, but watching the Devin console I can see it building and using the code to ensure commits are not complete garbage. When it has checked-in compilable and almost right but slightly wrong code, automatically running lint and tests (it doesn't always run them before checking in) from ci triggers it to push a fix on its own.
Feedback loops are nice, but they can be expensive, and time consuming (oh look at me complain that it takes Devin a whopping 15 minutes to complete a task) so I can definitely see the value in type constraints.
The way I've heard the CAP theorem used practically at a high level is to frame the question as follows:
What happens in the case of a (logical) network partition? - an AP system continues taking requests and provides eventual consistency, while a CP system waits for the partition to go away, or says come back later.
10 bucks says the lesson learned will be "remember kids, always set -u (and other good ideas, like set -e, set -o pipefail, and personally I like set -o posix but you'll need to give up process substitution for that)."
One unique advantage Palantir would have over Facebook is that if you get the itch to travel, Palantir casts a much wider net throughout the world (assuming you'd be willing to work as a forward deployed engineer, which in Palantir's case is genuinely not a sales role).
Some people want to see healthy EPS growth, and as you point out some patient investors are willing to buy the "reinvesting in accelerated growth" thesis.
But everyone is getting tired of AMZN's lack of transparency. Increasingly, buying AMZN is akin to buying the "Bezos is the next Jobs" meme on faith.
SystemC is the C++ equivalent that's been around for a long time. For a project I was working on, I used SystemC just for system-level modelling, it didn't bother me that I couldn't synthesize. To achieve decent clock-rates it would have been a good idea to reimplement the whole thing in "native" Verilog anyway (though my project didn't get that far). What SystemC provided me with is a way to sanity-check my model at the "transaction" level.
Pretty cool to see this, and going forward as a roadmap there is much they could borrow from SystemC.
The only time I was ever "in the market" for a board was in 2007, and back then it was a struggle getting parts; this was in the days of FX/LX/SX availability, and I wanted an SX part (with many DSP units) but basically got told no unless I wanted to buy over 50 units. So, had to settle for the bog standard FX. Paid USD5k for it (a premium for Infiniband connectivity).