jercos · HackerTrans

I think you highlight the exact issue rather well... fixed-point DSP instructions are awkward to use. The FPU and the double-precision hardware with its baked operations work with IEEE floats out of the box, so the programmer can be "lazy." A thousand new programmers can write something like `* 0.7` in C++ inside a tight loop without it stealing 200 instructions from the timing of the rest of the program.

jercos

2 anni fadiscuss

Downside is it occupies a CS on the QSPI controller, presumably bonding to the same pads as the QSPI pins on the package, so now you only have one external memory IC. It's a very small tradeoff all things considered, but is still technically a tiny disadvantage over highly integrated MCUs.

A potential alternative would have been a directly memory-mapped NOR flash die, but that would have required more bond wires, more dedicated pads on the die, a port on the bus, and on top of that the memory die would have been more expensive too.

An older (and often impractical) alternative is to use a single die with both flash and SoC on, in the same process. This usually forces a larger-than-desired process node to match the flash technology, making the SoC take up more space. The result requires no extra bond wires or pads, but now you're really manufacturing a flash chip with an MCU attached.

jercos

2 anni fadiscuss

A significant part of the problem is that a majority of people are unaware of just how simple what they consider "intelligence" really is. You don't need actual intelligence to replace the public-facing social role of a politician, or a talking head, or a reactive-only middle manager. You just need words strung together that fit a problem.

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