petermclean

  Location: Toronto, Ontario
  Remote: Yes and Hybrid
  Willing to Relocate: No
  Technologies: C/C++, FPGA, SystemVerilog, AI ML Inference, AI Compiler, Hardware Architecture, Python, CMake/general infrastructure
  Résumé/CV: https://www.linkedin.com/in/petercdmclean
  Email: peter at mcl.ean.email

  class mybits_t : bit::bit_array<17> {
    public:
      // slice a 1 bit sized field
      // returns a proxy reference to the single bit
      auto field1() {
        return (*this)(0, 1);
      }

      // slice a 3 bit sized field 
      // returns a proxy reference to the 3 bits
      auto field2() {
        return (*this)(1, 4);
      } 
  };
  mybits_t mybits(7);
  assert(mybits.field1() == 1);
  mybits.field1() = 0;
  assert(static_cast<int>(mybits) == 6); //no implicit cast to integers, but explicit supported