Intel’s High-End Cascade Lake CPUs to Support 3.84 TB of Memory per Socket(anandtech.com)
anandtech.com
Intel’s High-End Cascade Lake CPUs to Support 3.84 TB of Memory per Socket
https://www.anandtech.com/show/13059/intels-upcoming-cascade-lake-cpus-to-support-384-tb-of-memory
94 comments
Well they do feel a bit under siege according to the press so one might expect them to put their best foot forward. Not that I think they should pull shenanigans like that but it is common for companies, especially tech companies, to do this when they perceive they are losing ground to a competitor.
As others have pointed out, the addition comes from their support of Optane "dimms" which have much higher densities than DDR4 memory in the same form factor.
This is going to give the folks who write schedulers some more variants to play with. First it was per core memory, then it was per socket memory per core, and now it is memory type per socket per core. So you don't want your process running on Core3 with its pages mapped to Optane memory that is attached to the other socket (worst case).
As others have pointed out, the addition comes from their support of Optane "dimms" which have much higher densities than DDR4 memory in the same form factor.
This is going to give the folks who write schedulers some more variants to play with. First it was per core memory, then it was per socket memory per core, and now it is memory type per socket per core. So you don't want your process running on Core3 with its pages mapped to Optane memory that is attached to the other socket (worst case).
Case in point:
> chips will support up to 3.84 TB of memory per socket ... due to combining 512 GB Optane DIMMs and 128GB DDR4 DIMMs
> ...
> in a 6 x Optane and 6 x DDR4 configuration, they will provide 3072 GB of 3D XPoint memory and 768 GB of DDR4 RAM for a total of 3.84 TB of memory
Optane DIMMs don't really have the performance characteristics of traditional DRAM. It sounds like the real capacity per socket is 12 x 128GB = 1.53 GB, which is the same capacity as the previous generation.
That being said, I'm optimistic about Optane DIMMs - it seems like an interesting performance point in between DRAM and SSDs.
> chips will support up to 3.84 TB of memory per socket ... due to combining 512 GB Optane DIMMs and 128GB DDR4 DIMMs
> ...
> in a 6 x Optane and 6 x DDR4 configuration, they will provide 3072 GB of 3D XPoint memory and 768 GB of DDR4 RAM for a total of 3.84 TB of memory
Optane DIMMs don't really have the performance characteristics of traditional DRAM. It sounds like the real capacity per socket is 12 x 128GB = 1.53 GB, which is the same capacity as the previous generation.
That being said, I'm optimistic about Optane DIMMs - it seems like an interesting performance point in between DRAM and SSDs.
Tiny correction: Should be 1.53 TB, not 1.53 GB
Even tinier correction: it's exactly 1.5 TB (1536/1024).
Certainly not tiny, off by 32 bit
Tiny correction: Should be 10 bits not 32 bits.
I meant tiny as in maybe not even worth pointing out since people will understand it anyway.
only 3 bit diff between the strings
Yeah, marketing lies. Go AMD go!
AMD is guilty of it as well. "AVX2" -> not really!
But yes I do wish them well. Make the avx support real AMD!
AVX2 is a set of instructions and AMD supports them. How they support them is a different question. Does Intel not support AVX512 because their processors run at a lower clockspeed when they execute? There are more and less efficient ways to support an instruction set.
AMD decided that consistent clockspeeds were more important than wider units. They decided that most users won't use enough AVX instructions to overwhelm the AVX unit (especially with consistent clocks), so there was no justification in ballooning the die size and increasing power consumption without a decent payoff.
https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#New...
AMD decided that consistent clockspeeds were more important than wider units. They decided that most users won't use enough AVX instructions to overwhelm the AVX unit (especially with consistent clocks), so there was no justification in ballooning the die size and increasing power consumption without a decent payoff.
https://en.wikipedia.org/wiki/Advanced_Vector_Extensions#New...
As far as I know, Ryzen has avx-256, its four 128bit units can join as two 256 bit ones without any penalty.
What makes this not real AVX? Because there is not one dedicated 256-bit unit?
What makes this not real AVX? Because there is not one dedicated 256-bit unit?
> without any penalty
Except literally running at half capacity. That doesn't qualify as a "penalty" to you?
The point was that AMD advertised support for AVX in a context where you'd expect it to be performance-comparable, and what they shipped was "support" for AVX in the sense that the code wouldn't crash, but wouldn't provide any performance benefit over SSE either.
Except literally running at half capacity. That doesn't qualify as a "penalty" to you?
The point was that AMD advertised support for AVX in a context where you'd expect it to be performance-comparable, and what they shipped was "support" for AVX in the sense that the code wouldn't crash, but wouldn't provide any performance benefit over SSE either.
> Except literally running at half capacity.
I’ve been writing SIMD code for some time now, and I disagree.
You can read the documentation I’ve generated https://github.com/Const-me/IntelIntrinsics AVX intrinsics begin with _mm256_.
You’ll find that for some AVX operations, such as _mm256_fmadd_ps, _mm256_adds_epi8, _mm256_blendv_ps, both latency and throughput of Ryzen is equivalent to Skylake. For some others, e.g. _mm256_add_ps, _mm256_mul_ps, Ryzen is close to some older Intel, Haswell or Broadwell. Only for very rarely used stuff, e.g. _mm256_broadcast_ps, _mm256_madd_epi16, Ryzen is significantly slower than Intel.
I’ve been writing SIMD code for some time now, and I disagree.
You can read the documentation I’ve generated https://github.com/Const-me/IntelIntrinsics AVX intrinsics begin with _mm256_.
You’ll find that for some AVX operations, such as _mm256_fmadd_ps, _mm256_adds_epi8, _mm256_blendv_ps, both latency and throughput of Ryzen is equivalent to Skylake. For some others, e.g. _mm256_add_ps, _mm256_mul_ps, Ryzen is close to some older Intel, Haswell or Broadwell. Only for very rarely used stuff, e.g. _mm256_broadcast_ps, _mm256_madd_epi16, Ryzen is significantly slower than Intel.
oh, they are twisting words with the marketing about "no penalty" pretty bad!
https://en.wikichip.org/wiki/intel/frequency_behavior
Intel reduces clockspeeds when running AVX2 and drastically decreases clockspeeds when running AVX512. AMD's slightly smaller unit doesn't need to slow down, so the actual performance difference is smaller than it would appear.
Changing frequency takes time. Also, if you are putting through an AVX instruction and a few integer instructions at the same time, the integer instructions will downclock the whole time the AVX pipeline is in use (plus the time before/and after while the clockspeed is being adjusted) decreasing performance for more than just the AVX.
There are a couple articles written on the topic. Here's one.
https://blog.cloudflare.com/on-the-dangers-of-intels-frequen...
https://software.intel.com/en-us/forums/intel-isa-extensions...
Intel reduces clockspeeds when running AVX2 and drastically decreases clockspeeds when running AVX512. AMD's slightly smaller unit doesn't need to slow down, so the actual performance difference is smaller than it would appear.
Changing frequency takes time. Also, if you are putting through an AVX instruction and a few integer instructions at the same time, the integer instructions will downclock the whole time the AVX pipeline is in use (plus the time before/and after while the clockspeed is being adjusted) decreasing performance for more than just the AVX.
There are a couple articles written on the topic. Here's one.
https://blog.cloudflare.com/on-the-dangers-of-intels-frequen...
https://software.intel.com/en-us/forums/intel-isa-extensions...
> without any penalty.
My understanding is that without any penalty was not true, but it is possible the new gen cpus have changed that, I have not firsthand benchmarked it.
My understanding is that without any penalty was not true, but it is possible the new gen cpus have changed that, I have not firsthand benchmarked it.
Well at least it can address 3.84 TB of RAM (maybe more, because that's not a multiple of a power of two.) I suppose if you could get 256GB DDR4 DIMMs you'd have 12*256 = 3072 = 3TB of RAM. Yuu'd have to give the RAM cartel your first-born to pay for it, but that would be some machine!
But what market are they even trying to hit here? DDR4 prices are insane, but home consumers don't run large NUMA systems.
Data center admins are going to be able to get the capitol for real DDR4 over Optane. They'd need to be ordering a lot of servers before the price point becomes significant enough that they'd order an Optane configuration and decide to benchmark them.
I'd be curious about the real benchmarking at that point. It there a performance boost to simply have more memory, even if some of it is Optane, or is it better to have a lower capacity without the Optane sticks? I have a feeling this will vary heavily by application too.
Data center admins are going to be able to get the capitol for real DDR4 over Optane. They'd need to be ordering a lot of servers before the price point becomes significant enough that they'd order an Optane configuration and decide to benchmark them.
I'd be curious about the real benchmarking at that point. It there a performance boost to simply have more memory, even if some of it is Optane, or is it better to have a lower capacity without the Optane sticks? I have a feeling this will vary heavily by application too.
The idea of putting ssds in memory dimms isn't new, the jedec standard for this is included in ddr3. It's referred to as an nvdimm(-f for SSD), sandisk and IBM both produced and sold them. These are supported since Linux kernel 4.1 and show up as a block device in /dev/pmem. The latest optane variants are nvdimm-p and are not treated like block storage devices but instead as persistent memory to the OS.
The storage dimms have some notable benefits over pcie nvme ssds - latency to the processor is extremely low, they give extra total storage I/O since they're leveraging a different controller on the cpu with its own bandwidth, while still leaving pcie bandwidth for traditional storage. They can add capacity to a small system (a 1U server can hold 24 such ssds)
As I see it though, these optane dimms are just fast swap drives which do not offer the same consistent throughput as true memory dimms. They are transparent to the OS which is normally in charge of deciding what stays in memory and what goes to swap. Use of an Intel sdk is required to leverage much of the benefits. It's also Intel-only as far as support goes for now. As usual the marketing doesn't mention the throughput or pricing and instead of comparing to memory they compare it to storage.
http://www.admin-magazine.com/HPC/Articles/NVDIMM-Persistent...
https://thessdguy.com/an-nvdimm-primer-part-1-of-2/
https://www.extremetech.com/extreme/270270-intel-announces-n...
The storage dimms have some notable benefits over pcie nvme ssds - latency to the processor is extremely low, they give extra total storage I/O since they're leveraging a different controller on the cpu with its own bandwidth, while still leaving pcie bandwidth for traditional storage. They can add capacity to a small system (a 1U server can hold 24 such ssds)
As I see it though, these optane dimms are just fast swap drives which do not offer the same consistent throughput as true memory dimms. They are transparent to the OS which is normally in charge of deciding what stays in memory and what goes to swap. Use of an Intel sdk is required to leverage much of the benefits. It's also Intel-only as far as support goes for now. As usual the marketing doesn't mention the throughput or pricing and instead of comparing to memory they compare it to storage.
http://www.admin-magazine.com/HPC/Articles/NVDIMM-Persistent...
https://thessdguy.com/an-nvdimm-primer-part-1-of-2/
https://www.extremetech.com/extreme/270270-intel-announces-n...
I thought the real advantage of Optane was bypassing the pcie bus, with much larger bandwidth of dimm: 80GB/s instead of 12GB/s
DDR4 dimm read throughput is about 20GB/s per dimm. PCIe 3.1 x4 is 16GB/s. I feel very comfortable claiming that these optane dimms will not reach 20GB/s of sustained performance.
The advantage here being latency (and thus single queue throughput)
The advantage here being latency (and thus single queue throughput)
> PCIe 3.1 x4 is 16GB/s
PCIe x4 is 3.94GB/s. PCIe x16 is 15.76GB/s.
> DDR4 dimm read throughput is about 20GB/s per dimm
Per channel, not per dimm. Two dimms typically go into a singular channel.
> The advantage here being latency (and thus single queue throughput)
Agreed
PCIe x4 is 3.94GB/s. PCIe x16 is 15.76GB/s.
> DDR4 dimm read throughput is about 20GB/s per dimm
Per channel, not per dimm. Two dimms typically go into a singular channel.
> The advantage here being latency (and thus single queue throughput)
Agreed
But pcie bus is shared with other cards. So 8 dimms is 8x faster than 8 pcie cards.
> But pcie bus is shared with other cards.
No, it's not, that's the whole point of pcie, and dimms share the memory bus anyway, so the whole point is moot.
No, it's not, that's the whole point of pcie, and dimms share the memory bus anyway, so the whole point is moot.
Well, it depends. "True" pcie slots do not share the bandwidth, but depending on available CPU lanes, which is awfully few in the last years on Intel - 16 lanes in top of the line i7? thats one graphics card - the slots are switched to 8x/8x, 8x/4x/4x and so on when populated.
M.2 slots are a whole another story, they are usually connected to the chipset instead of CPU on desktop motherboards (and finding this information for any particular board is difficult). The chipset is connected with CPU through DMI, which equals to pcie 4x and this is shared with everything on chipset - satas, gigabit ethernet, usb 3...
M.2 slots are a whole another story, they are usually connected to the chipset instead of CPU on desktop motherboards (and finding this information for any particular board is difficult). The chipset is connected with CPU through DMI, which equals to pcie 4x and this is shared with everything on chipset - satas, gigabit ethernet, usb 3...
Hmm. In that case never mind.
> It there a performance boost to simply have more memory, even if some of it is Optane, or is it better to have a lower capacity without the Optane sticks?
I would imagine it depends entirely on whether your working set fits in main memory already. if yes, you're not gonna get much speedup from more memory. but if you have to keep swapping from a traditional SSD, it's gonna be hard for faster main memory to make up for that.
I would imagine it depends entirely on whether your working set fits in main memory already. if yes, you're not gonna get much speedup from more memory. but if you have to keep swapping from a traditional SSD, it's gonna be hard for faster main memory to make up for that.
Intel keep positioning optane as "close to dram" preformance (especially with misleading marketing nonsense like this), it does have some advantages over flash, mostly related to random access times, but its nowhere near the orders of magnitude more preformant that something would require to fill the preformance point between DRAM and SSDs.
Optane is almost entirely hype, with no substance.
Optane is almost entirely hype, with no substance.
I don't see how a first generation product with similar performance and superior latency to a mature technology (nand) that took decades to develop has no substance. The second generation of Optane is coming out this year and it's going to be an order of magnitude better. It's just a matter of time until nand is obsolete.
If Optane is Intel-only, it is not going to replace NAND.
You and mtgx both mention Optane performance is "not even close to dram." I'm interested in if you have found anyone who has benchmarked the DIMM version with respect to actual DRAM. I see several sites that have benchmarked the Nvme version but this has additional hoops that the DIMM version would not have to jump through and so I've been on the lookout from Anandtech or another reputable source for actual numbers.
> Optane is almost entirely hype, with no substance.
As it has been from the very first announcement. Intel is being very misleading marketing Xpoint as "memory". It's not even saying it's "close to memory" now. They're literally calling Xpoint memory (as in the same meaning we use for RAM).
Considering Xpoint has much lower performance than RAM, I'm starting to believe that maybe the FTC should intervene over "false advertising". It's just too bad the U.S. doesn't have as strong laws as Europe does for false advertising.
As it has been from the very first announcement. Intel is being very misleading marketing Xpoint as "memory". It's not even saying it's "close to memory" now. They're literally calling Xpoint memory (as in the same meaning we use for RAM).
Considering Xpoint has much lower performance than RAM, I'm starting to believe that maybe the FTC should intervene over "false advertising". It's just too bad the U.S. doesn't have as strong laws as Europe does for false advertising.
In addition, their (mis)handling of spectre/meltdown PR also eroded trust IMHO.
As someone who has watched every single Intel announcement very closely over the past ~5 years, I can say that Intel's marketing/PR has started to become palpably more misleading every year.
And the reason for that is because their chips/products don't improve as much every year, and Intel is becoming more desperate each year as it faces more competition from Arm, and now AMD, too. So it's trying to "make-up the difference" by being more misleading about it. It's not just the competition either, but the fact that Intel needs to make it sound like their next-gen chips "are so much better" than last year, and make you buy the new ones, too.
I'll give an analogy. Let's say a year ago Intel's CPU got an IPC boost of 10%. But this year it's only getting a 5% boost. Intel will either increase power consumption of the chip to get that 10% or will increase boost speed while keeping the base clock speed the same or lower it for the next-gen chip, just so it can say "the peak performance is once again +10% for this new generation!".
Kaby Lake, Coffee Lake, and whatever Lake is coming next that isn't on 10nm all suffer from this kind of thinking. It's the same kind of thinking that created the whole scandal with the 28-core "5GHz chip". Intel's marketing is all about creating the perception that their chips are significantly better than the last generation. It's why they now have "Xeon Gold", too.
At this point I wouldn't trust any of Intel's announcements until they are verified by trustworthy parties (of which there are only a handful, because most don't go deep enough into their reviews to actually spot what Intel has done to their products to mislead customers).
And the reason for that is because their chips/products don't improve as much every year, and Intel is becoming more desperate each year as it faces more competition from Arm, and now AMD, too. So it's trying to "make-up the difference" by being more misleading about it. It's not just the competition either, but the fact that Intel needs to make it sound like their next-gen chips "are so much better" than last year, and make you buy the new ones, too.
I'll give an analogy. Let's say a year ago Intel's CPU got an IPC boost of 10%. But this year it's only getting a 5% boost. Intel will either increase power consumption of the chip to get that 10% or will increase boost speed while keeping the base clock speed the same or lower it for the next-gen chip, just so it can say "the peak performance is once again +10% for this new generation!".
Kaby Lake, Coffee Lake, and whatever Lake is coming next that isn't on 10nm all suffer from this kind of thinking. It's the same kind of thinking that created the whole scandal with the 28-core "5GHz chip". Intel's marketing is all about creating the perception that their chips are significantly better than the last generation. It's why they now have "Xeon Gold", too.
At this point I wouldn't trust any of Intel's announcements until they are verified by trustworthy parties (of which there are only a handful, because most don't go deep enough into their reviews to actually spot what Intel has done to their products to mislead customers).
> and that it was a server socket
What's wrong with that? High-end workstations often have the same sockets as servers don't they? Did they say it wasn't a server socket?
What's wrong with that? High-end workstations often have the same sockets as servers don't they? Did they say it wasn't a server socket?
The answer to your question is, I believe, in the article that grandfather post linked to.
"What Platform Did It Run On? Intel did not answer this platform directly, however it was clear that the CPU was aimed at the LGA3647 server-based socket given from our examination of the demo system. It was unclear how Intel was going to promote this as an extreme workstation-type system, however Intel did note that they expect only a select market to be interested in this type of processor: a niche of a niche."
"What Platform Did It Run On? Intel did not answer this platform directly, however it was clear that the CPU was aimed at the LGA3647 server-based socket given from our examination of the demo system. It was unclear how Intel was going to promote this as an extreme workstation-type system, however Intel did note that they expect only a select market to be interested in this type of processor: a niche of a niche."
Hmm I don't see whatever you are seeing. It's running on a server socket. That's normal for an extreme workstation, which is what Intel publicly suggested it was for because they said it was for a very select market.
They probably felt pressured to release that because the next gen thread rippers are actually going to approach those specs: 32 core 3.8 (base) GHz as per https://www.techradar.com/news/amd-ryzen-threadripper-2nd-ge...
supposedly coming out in Q3, i.e. soon
supposedly coming out in Q3, i.e. soon
Threadripper may come close in core count, but it cannot use registered memory, which means it's limited to 128 GB of RAM (based on the current maximum UDIMM capacities). That's not competitive in the server space.
EPYC supports up to 2TB per CPU so it's not entirely uncompetitive... Not sure I trust Intel's figures here anyway - some people are saying it's less than the 3.84TB per socket...
https://www.tweaktown.com/news/58052/amd-epyc-32c-64t-3-2ghz...
https://www.tweaktown.com/news/58052/amd-epyc-32c-64t-3-2ghz...
Why does threadripper need to be competitive in the server space?
Edit: emphasis on threadripper, which is a consumer product.
Edit: emphasis on threadripper, which is a consumer product.
The server market is like Formula One for chip makers. It is where there is enough money to really push the limits of the technology. Competing in such leagues brings institutional knowledge, and bragging rights.
Servers is also where you get back-and-forth discussions with customers large enough to be worth listening to. Getting useful feedback from the users of desktop CPUs is difficult and time-consuming. But someone like Facebook or Google, who buy thousands of CPUs, and know how to use them, can give you quick and reliable feedback. They can test prototypes and suggest changes within weeks.
Servers is also where you get back-and-forth discussions with customers large enough to be worth listening to. Getting useful feedback from the users of desktop CPUs is difficult and time-consuming. But someone like Facebook or Google, who buy thousands of CPUs, and know how to use them, can give you quick and reliable feedback. They can test prototypes and suggest changes within weeks.
Threadripper doesn't target servers, their EPYC line does...
> Why does threadripper need to be competitive in the server space?
It doesn't, and AMD doesn't market Threadripper for server use. It only came up in this discussion because of a misunderstanding of Threadripper's capabilities.
It doesn't, and AMD doesn't market Threadripper for server use. It only came up in this discussion because of a misunderstanding of Threadripper's capabilities.
EYPC is their server line, which has a 32 core count cpu with RDIMM support.
oops, you're right, good point
If there are 42 address bits, there are 42 address bits. Can't really fake something like that, unlike their overclocking experiment.
Because AMD came out with innovation with their incredible Threadripper while Intel was going to keep dishing out about 10% faster cpus per year and maximize profits.
They have gotten greedy and lazy without any competition.
They have gotten greedy and lazy without any competition.
that damaged your trust? That seems totally fine to me, if you need 28 cores at 5Ghz you can have it. get a server board and cool it.
Years before that they were interfering with compilers and cheating at benchmarks to screw over AMD which was actual, willful, evil deception, but THIS damaged your trust?
Years before that they were interfering with compilers and cheating at benchmarks to screw over AMD which was actual, willful, evil deception, but THIS damaged your trust?
Um, you forgot intimidating suppliers to not use AMD and much more outright antitrust behavior.
[deleted]
From what I remember the cooling unit alone required 1200W just to run and was the size of a small air conditioning unit, conveniently hidden under the table.
(edit: obviously i've replied to the wrong comment, this is aimed at Intel's deceptive techniques which is currently the top comment)
(edit: obviously i've replied to the wrong comment, this is aimed at Intel's deceptive techniques which is currently the top comment)
I've weighed up the pros and cons, and my next processor will be the 32 core AMD cpu. This seems much better value than anything Intel has to offer.
The last gen 1900x (3.8 GHz 8 core) is on sale now for only $300
AMD becoming competitive again is one of the better things to happen in tech in recent years
AMD becoming competitive again is one of the better things to happen in tech in recent years
I got a Ryzen 7 for my recent build and am pretty happy with it.
Same, bought a 2700x and couldn't be happier... the extra cores does wonders for using something like intellij whilst browsing / gaming. You only need something like an 8700k / 8086k if you have a 100hz+ monitor and want to spend more money than necessary on a dead socket. AMD are really landing the uppercuts this time round
I've got a R5 1600X with overclocked RAM (3GHz) and a 144Hz display. I've yet to encounter a game that doesn't bottleneck on the GPU with vsync on. Either it hits beyond 144fps and it wouldn't matter, or its below 144fps bottlenecked on the GPU.
Im in the same boat, my current processor I got was an intel specifically for the high single thread speed (a few performance heavy single thread games), but honestly the bit of extra clock speed hasn't really done it for me. The improvement is marginal compared to the ability to scale across cores and I expect pretty much everything I use now to take advantage of it. These days I have so many more programs concurrently open/in operation compared to the past, many of which are now fully capable of each using multiple cores, and I can still see myself using more. While my system isn't a spring chicken anymore I still have run into full system utilization a lot sooner and more often than I ever expected when I built this.
the 16 physical core TR is glorious so I'm sure you'll enjoy the 32 core even more!
I'm going to wait 1-2 years to upgrade since I just got the 1st gen.
I'm going to wait 1-2 years to upgrade since I just got the 1st gen.
Much agreed. I've wanted a high core count cpu for absolutely no reason for the longest time. I can't wait to spend thousands of dollars on a cpu just to improve compile times by a few seconds. -j64 anyone?
It's a beast! I'm not sure if I'd give up single-thread speed, but if you can load those cores, it's an incredible offer.
I'd love to see more popular processors with high core count, even if at the cost of single thread performance. When even a phone CPU has 8 cores, being able to use the parallelism on the stuff we normally don't use it would improve life for everyone.
And, with high core counts, we can start playing with things like dedicating cores (and their L1 caches) to single tasks, kind of specializing them as we do with mainframes.
And, with high core counts, we can start playing with things like dedicating cores (and their L1 caches) to single tasks, kind of specializing them as we do with mainframes.
as core count goes up the number of tasks that can be sped up starts to shrink, because memory access and throughput become more and more of a limiter. That is why you tend to see huge l3 caches on the big core cpus, it helps but it can still be a challenge to load up all 32 cores and get any speedup, for many workloads. l3 cache is not THAT much faster than ram.
that is why I tend to eye the ~6 core machines for desktop use, higher single core mhz on them
that is why I tend to eye the ~6 core machines for desktop use, higher single core mhz on them
If we can balance the L1 cache eviction rate for the extra cores (since L1 is not shared), memory bandwidth pressure will be lower. These monsters also have a lot of memory channels to address memory hunger.
I still think we can push the envelope a bit further for most common desktop software.
I still think we can push the envelope a bit further for most common desktop software.
L1 cannot be too big and it should not grow any larger. L2 is a better option being 'only' 3 times slower than L1 (L1 tend to be ~3 clocks to read).
L3 is an interesting concept. Communication through L3 is quite beneficial in concurrent programming when done right; other than that it's there to hide the latency of accessing RAM. However, it's shared and easy to trash.
The software developers could do a lot for memory throughput hungry applications (datastructure layout, not using bloated strings for everything, not using linked lists, etc.), alas memory based optimizations almost never happen and tend to require a great deal of hardware understanding + non scripting language(s).
The software developers could do a lot for memory throughput hungry applications (datastructure layout, not using bloated strings for everything, not using linked lists, etc.), alas memory based optimizations almost never happen and tend to require a great deal of hardware understanding + non scripting language(s).
> L1 cannot be too big and it should not grow any larger. L2 is a better option
L1 and L2 grow linearly with the number of cores. If you have cores to burn, pinning processes makes a lot of sense.
L1 and L2 grow linearly with the number of cores. If you have cores to burn, pinning processes makes a lot of sense.
rbanffy, it was meant per core. Counting L1/L2 across the entire die is rather pointless.
Pinning makes most sense in NUMA indeed. Nowadays my impression is that often times the multicore/socket hardware tend to be chopped down by virtual machines, though.
Pinning makes most sense in NUMA indeed. Nowadays my impression is that often times the multicore/socket hardware tend to be chopped down by virtual machines, though.
If you use VMs and don't pin VMs to cores (which is pretty sensible) yes, but if you run your processes on your metal, pinning processes will reduce pressure on their L1/L2 caches if a given process is running on it constantly, the odds the caches have the "right" data increase. The same goes for the processes that are not pinned, as they don't need to compete with the pinned one (unless they have the misfortune of being scheduled on those cores). In the end, it'll look like your cache is bigger.
There is definitely room to improve how often and efficiently desktop software utilizes more cores, but I don't expect it will be common that ~32 cores gets you much gain over ~8. But when you do have a workload that can benefit, like if you know GCC will compile a huge c++ project linearly faster up to 32 cores, then it is VERY welcome!
If you have cores to spare, you can do incremental compilation every time you save a file. You can also do a lot of speculative work that may be thrown away but, in case it's needed, it's already done.
There is no such thing as too many cores ;-)
There is no such thing as too many cores ;-)
It depends on your workload. If you are using all these cores (ex: compiling) then that's probably the best option.
If you are gaming however, 32 core is mostly useless and you should probably go with single thread performance. Intel i5 are still the CPUs of choice for gamers, though AMD Ryzen 5 are not bad either.
If you are gaming however, 32 core is mostly useless and you should probably go with single thread performance. Intel i5 are still the CPUs of choice for gamers, though AMD Ryzen 5 are not bad either.
What I really wanted to know is the performance difference in Postgre / MySQL, between 128GB of DRAM, with 1TB of SSD, 1TB of Optane via PCI-E, and Optane DIMM.
You can find various benchmarks and testing results here: https://www.acceleratewithoptane.com/stories. We're working on some Postgre, or I invite you to do some benchmarking yourself on our community lab.
Disclosure: I work at Intel partly with the Optane SSDs (the PCIe version you mention).
Disclosure: I work at Intel partly with the Optane SSDs (the PCIe version you mention).
Here's some benchmark for MySQL, SSD vs Optane (Intel vs Intel): http://dimitrik.free.fr/blog/posts/mysql-performance-80-ga-i...
Not optane dimm though?
Come on, AnandTech! 3840GB != 3.84TB -- that's mixing binary and decimal systems. Say either 3840GB or 3840/1024 = 3.75TB.
They are correct here. TB is for decimal, TiB is for binary.
https://en.m.wikipedia.org/wiki/Binary_prefix
https://en.m.wikipedia.org/wiki/Binary_prefix
No. Their "GB" numbers are actually GiB; DRAM always uses binary units because it's addressed in binary. (Maybe if they used the correct suffix, they wouldn't have made the error.)
The problem is that “GB” in the context of RAM specifically invariably means 1024^3 bytes, i.e. GiB. To then use that definition of TB here, you're mixing 1000 and 1024 denominations.
"In 1998, the International Electrotechnical Commission IEC introduced the binary prefixes kibi, mebi, gibi"
But that hasn't stopped anyone because when talking about computers and data storage, unless you got some wacky old russian terenary system running in some bunker, everything should always be expressed using a base 2 system.
But that hasn't stopped anyone because when talking about computers and data storage, unless you got some wacky old russian terenary system running in some bunker, everything should always be expressed using a base 2 system.
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Cores! Gigahertz! Terabytes! Odds are... still f-ing busted.
How will the numbers look after the next Spectre/TLBleed/etc patch?
I'd be more impressed by a boring processor that works.
How will the numbers look after the next Spectre/TLBleed/etc patch?
I'd be more impressed by a boring processor that works.
Good question. It's probably WAY too soon to expect any hardware that's not full of vulnerabilities in the pipeline, TPM, and microcode. They need to redesign their cores from the ground up. When will that happen?
I don't believe taking out questionable overwrought performance voodoo would constitute "redesign[ing] their cores from the ground up". Just like any other form of engineering, you know when you've solved a problem, and you know when you've made a hail mary pass. Take out the hail mary passes.
In most other areas of engineering where there is still some concept of liability, the process is: validation first, save hot-rodding for v2. CPU industry is largely unencumbered by liability, driven by specious benchmarks, and has no use for that process.
In most other areas of engineering where there is still some concept of liability, the process is: validation first, save hot-rodding for v2. CPU industry is largely unencumbered by liability, driven by specious benchmarks, and has no use for that process.
Since then, whenever I see a headline with Intel in it, I heavily discount it until I can verify the facts. They’ve damaged my trust, and I suspect many others.