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itsrainingagain

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VHDL processes, resets, and rising edges

p-code.org
4 points·by itsrainingagain·5 năm trước·0 comments

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itsrainingagain
·5 năm trước·discuss
The rules are here https://www.tcl-lang.org/man/tcl/TclCmd/Tcl.htm

I guess Tcl is just one of things that divides opinion.
itsrainingagain
·5 năm trước·discuss
Thanks that made me smile :)

I actually really like Tcl, I like the simplicity of its command argument nature.

The thread "Why is Tcl syntax so weird" was posted a couple of weeks back, https://news.ycombinator.com/item?id=29143346. The first comment on the page includes "Tcl is still a wonderful language and I often lament how it’s mostly died out". Happily, for me at least, it's still going strong in HDL land :)
itsrainingagain
·5 năm trước·discuss
I use VHDL, not used Python. My understanding is that Python will be many times slower than VHDL, so verification tests that take the best part of a week would then take several weeks with Python. And being dynamically typed is fine if you are running a script that returns quickly, but what about it borking even hours into a simulation, when you can catch most dynamic type errors with stronger typed languages at compile time. Python doesn't look like a compelling replacement for VHDL, unless my understanding is off.