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mrLSD-dev

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Submissions

F# RISC-V v0.6.0 released

github.com
4 points·by mrLSD-dev·الشهر الماضي·0 comments

Formal Verification of a Token Sale Launchpad: A Compositional Approach in Dafny

arxiv.org
1 points·by mrLSD-dev·قبل 8 أشهر·0 comments

Swift EVM (Ethereum Virtual Machine) new release v0.5.13

github.com
2 points·by mrLSD-dev·السنة الماضية·3 comments

[untitled]

1 points·by mrLSD-dev·السنة الماضية·0 comments

Aurora EVM rust library: Cancun hard fork release

github.com
1 points·by mrLSD-dev·قبل سنتين·0 comments

[untitled]

1 points·by mrLSD-dev·قبل سنتين·0 comments

[untitled]

1 points·by mrLSD-dev·قبل سنتين·0 comments

Custom Semantic Analyzer library written Rust lang

github.com
19 points·by mrLSD-dev·قبل 3 سنوات·0 comments

[untitled]

1 points·by mrLSD-dev·قبل 3 سنوات·0 comments

Rust library semantic-analyzer-rs for creating subset of compilers

github.com
2 points·by mrLSD-dev·قبل 3 سنوات·1 comments

F# RISC-V Instruction Set formal specification

github.com
134 points·by mrLSD-dev·قبل 3 سنوات·42 comments

comments

mrLSD-dev
·السنة الماضية·discuss
Swift EVM supports any build target, including Windows.
mrLSD-dev
·قبل 3 سنوات·discuss
Research project, rust library for creating subset of compilers and programming languages
mrLSD-dev
·قبل 3 سنوات·discuss
Just out of curiosity, what about that: https://people.csail.mit.edu/bthom/riscv-spec.pdf
mrLSD-dev
·قبل 3 سنوات·discuss
I completely agree. And I specifically draw your attention to the fact that this is not a formal verification, which it would be reasonable to do: Coq, Isabellll, Agda, F* etc. However, Formal Specification. Those. representation of the specification in a formalized form. Haskell example: https://github.com/rsnikhil/Forvis_RISCV-ISA-Spec

In this case, the term "formal" refers to the formalization of the representation of the specification. And it seems to be already established.
mrLSD-dev
·قبل 3 سنوات·discuss
You can easily import and use specific functions for the decoder, or executor for specific ISA. Or even use the whole state machine. And this is represented by tests. Those. any single RISC-V architecture instruction, or an entire program. Because it can be used as a cpu emulator. Those. OS doesn't matter in this case. However, I draw your attention to the fact that this is only a processor, and not an emulation of the PC and its peripherals.
mrLSD-dev
·قبل 3 سنوات·discuss
It's possible to emulate. But not only. The main goal is to formalize the representations of the RISC-V instruction set (ISA), decoder, executor, and state machine. So it's more formal point of view for RISC-V ISA.
mrLSD-dev
·قبل 3 سنوات·discuss
unfortunately not, because it does not apply directly to ISA. However, the idea is interesting.
mrLSD-dev
·قبل 3 سنوات·discuss
The main competitor of Haskell, and also not the most popular language. However, the only way to popularize a language is to write in it. This project is trying to reveal the possibility of F#, and show the worthy side of F#,
mrLSD-dev
·قبل 3 سنوات·discuss
Due to the properties of F# as a functional language, using a pure representation of functions and a strong type system - in this case, this is a formalization of RISC-V ISA (instruction set). Since we don't have side effects for pure functions. As it has a State machine, one fun opportunity is to execute elf-bin files for it for RISC-V architecture.

I'm not sure what do you mean "compile programs", because it's not the compiler.
mrLSD-dev
·قبل 3 سنوات·discuss
Since F# is a functional language, it allows, using a purely functional approach and a system of strong types, pure functions, to formally verify the correctness of a particular ISA. The emulator is nothing more than a side effect.
mrLSD-dev
·قبل 3 سنوات·discuss
RISC-V CPU formal specification written on F#. Formalazation of RISC-V ISA architecture.