The Dauug House - Dauug|36 minicomputer documentation(dauug.cs.wright.edu)
dauug.cs.wright.edu
The Dauug House - Dauug|36 minicomputer documentation
https://dauug.cs.wright.edu/
https://web.archive.org/web/20250320161133/https://dauug.cs....
5 comments
This project has moved to https://dauug.org.
Dauug|36 will be a 36-bit, 10 MIPS, open-source, maker-constructable minicomputer with preemptive multitasking, paged virtual memory, and no "complex VLSI" (no microprocessor, FPGA, PLD, ASIC, or DRAM). The basic "logic gate" of Dauug|36 is a synchronous static RAM IC (SRAM), which is loaded with a fixed truth table (firmware) at startup, allowing each "gate" to compute any deterministic function of 18 input bits and up to 18 output bits. The CPU is implemented as 22 of these "gates" (read-only SRAMs containing firmware) and some trivial 74AUC glue logic. The instruction set is refreshingly robust and has ~190 opcodes so far.
Dauug|36 will be a 36-bit, 10 MIPS, open-source, maker-constructable minicomputer with preemptive multitasking, paged virtual memory, and no "complex VLSI" (no microprocessor, FPGA, PLD, ASIC, or DRAM). The basic "logic gate" of Dauug|36 is a synchronous static RAM IC (SRAM), which is loaded with a fixed truth table (firmware) at startup, allowing each "gate" to compute any deterministic function of 18 input bits and up to 18 output bits. The CPU is implemented as 22 of these "gates" (read-only SRAMs containing firmware) and some trivial 74AUC glue logic. The instruction set is refreshingly robust and has ~190 opcodes so far.
I saw this guy give a talk and looking into its an amazing idea of the most secure computer without memory.
I would have said this design takes you back to the mid-70s, but the 74AUC logic family is so limited it's more like the late 60s. (Wow, that family is fast for discrete logic, though.)
Veeerry nice work! That said: if meant to be anything more than an intellectual exercise, imho it's better to target an existing system/architecture. There's a good # of existing systems out there that:
a) Can be built from discrete parts (okay, CPU & ROM/RAM excluded - usually). And b) Have an existing software library. Often a huge one.
b) Is the important bit here. It gives you a full suite of editors, assemblers, compilers, debuggers, productivity software, games, etc etc from day 1. Which bypasses the chicken-and-egg problem of "do something useful with it".
Modern IC's are not black boxes by definition. It's just the scale of today's VLSI that makes inspection by end users impossible.
Even eg. a lowly Cortex-M0 could be considered a complex beast in this context. But buy eg. 100....1000 (8 bit) microcontrollers, take a representative sampling of those (say, a few dozen specimens), decap, put under microscope & compare with architecture documentation. When determined "ok", use the rest of that batch to build stuff. Tedious? Yes! But (for a sufficiently motivated individual or organisation): doable.
Same for small-sized ROM/RAM & peripheral IC's.
IC vs. discrete logic is not the (essential) issue here. Scale/complexity of modern IC's is. Take a # of steps down the order-of-complexity-magnitude scale, and go from there.
a) Can be built from discrete parts (okay, CPU & ROM/RAM excluded - usually). And b) Have an existing software library. Often a huge one.
b) Is the important bit here. It gives you a full suite of editors, assemblers, compilers, debuggers, productivity software, games, etc etc from day 1. Which bypasses the chicken-and-egg problem of "do something useful with it".
Modern IC's are not black boxes by definition. It's just the scale of today's VLSI that makes inspection by end users impossible.
Even eg. a lowly Cortex-M0 could be considered a complex beast in this context. But buy eg. 100....1000 (8 bit) microcontrollers, take a representative sampling of those (say, a few dozen specimens), decap, put under microscope & compare with architecture documentation. When determined "ok", use the rest of that batch to build stuff. Tedious? Yes! But (for a sufficiently motivated individual or organisation): doable.
Same for small-sized ROM/RAM & peripheral IC's.
IC vs. discrete logic is not the (essential) issue here. Scale/complexity of modern IC's is. Take a # of steps down the order-of-complexity-magnitude scale, and go from there.
I think something like the Pineapple One [1] is just as trust worthy while being less obscurantist. I mean a 36-bit word is truly being different for retro's sake. There hasn't been a 36-bit word machine released since the PDP-10 in 1966 . If it strikes your fancy, please, go ahead, but I'd personally rather spend my time on a TTL-logic version of an architecture that has some mainstream support.
[1] https://hackaday.io/project/178826-pineapple-one
[1] https://hackaday.io/project/178826-pineapple-one